Q6600 Memory Bandwidth

[Gtadam]

Hello everyone, this is my first post:P

Anyhow, i got some marks from Siosoft sandra saying i got
5400mb/s float etc, performance on memory bandwidth.

Bandwidth efficency: 63%

My setup is a Q6600 with a p5k motherboard,
Memory: Twin2x2048-6400C4 @ 800mhz dual channel CAS: 4-4-4-12

Lavalys Everest says i got
Read: 6900MB/s Write: 4900MB/s Copy: 5500mb/s Latency:71.9ns

does this mean i have a huge bottleneck? or is the specified memory bandwidth enough for the cpu? im a little bit confused with the large diffrence between Read and write, shouldnt it be rougly the same?

do i need to improve it? im useing a non-overclocked rig atm.

[FearFactory]

Dual channel DDR2 800 it's more than enough for a 1066mhz FSB cpu.

[Gtadam]

I belive you are correct, after all ive read, tho im not just talking about
clockfreq. im talking about cpu to memory bandwidth(mostly) ive seen other systems with pc6400 ram get bandwidth close to 6900mb/s float point(siosoft sandra), so i was thinking if my results were too low to satisfy the optimal processor - memory bandwidth.

How much bandwidth can the Q6600 make use of? Ive heard people talk about that even 677mhz is enough for the q6600, but does that mean dual channel pc5300 width bandwidth 5300mb/s is enough?

[SRTDodge05]

Im getting
7200 memory read
6200 memory write
6200 memory copy
71.7 memory Latecy

4-4-3-8 @850mhz
Im testing in everest

[shaihulud]

Unfortunately, the ignorance of this subject matter always makes me cringe when I see the commentary of others. People always talk about the bandwidth of the CPU, but never what the bandwidth that is necessary for the entire system. There are also other benefits to having higher clock RAM besides more bandwidth.

[ctal]

Originally Posted by shaihulud

Unfortunately, the ignorance of this subject matter always makes me cringe when I see the commentary of others. People always talk about the bandwidth of the CPU, but never what the bandwidth that is necessary for the entire system. There are also other benefits to having higher clock RAM besides more bandwidth.

Gtadam -- You will want to read the following outstanding thread, with extensive empirical results based, as it happens, on the Q6600:

Which is faster, 9x333 or 8x375 on a q6600? Results inside

The bottom line is that FSB speed and memory speed would seem to have much less significance than many people believe, at least with this kind of modern hardware.

Shaihulud -- With all due respect for your many contributions to this Forum, your post is not helpful, especially given its tone and that the thread was originated by someone new. Also, what does the phrase "the bandwidth of the CPU" mean? We are talking about CPU-to-memory bandwidth; FSB bandwidth also relates, as you know, to CPU-to-display bus and CPU-to-Southbridge traffic (all via the Northbridge, of course). It's not clear what you are referring to by "the entire system." Also, your statement about higher clock RAM should be qualified by something along the lines of "unless the gains are offset by slower latencies."

Regards,
-- Al

[SRTDodge05]

i did a test with my memory the other day.

@800mhz 4-4-3-8 vs 1066mhz 5-5-5-15
I got a lot more bandwidth with my memory at 800mhz with lower timing then the faster speed.

[Drufuss]

I don't know yet exactly what the diff. timings would do in my system. Higher clock and longer timings or lower clock and faster timings?
On my previous system (my old and trusty P-III-S @ 1.6GHz with 512MB @ 153MHz) switching from standard (slow) timings to faster really did improve overall performance of my rig.

Just my 2cent.

Greetings

Dru

[shaihulud]

As I said ignorance of the subject matter makes me cringe every time. Now for a reader to become defensive because there is ignorance on the subject matter and somehow the reading of my post makes them become such is purely asinine and due solely to the reader’s comprehension. Tone cannot be easily comprehended with text, and there is not one single bit of bodily motion in which the studies of kinesis can help either, this I understand to an extent. So, it can be easily understood, by me, for anyone to miscomprehend the simple word of ignorance or the post.

However, it is really simple, most I read ignorantly post about the bandwidth of the CPU’s. However, this is not as important as it is to the entire system. For example, a bus master device needs bandwidth too. Hard drives, USB, GPU’s, networking devices, bus, et al need bandwidth. Now this issue is not really of bandwidth to the CPU because bandwidth, for the most part, will be satisfied due to caching and prefetching.

As I am sure you know, the Athlon 64 reaches a point of diminishing returns with supplied bandwidth because of execution unit’s ability to utilize resources and caching implementation. The Core 2 Dual has far less memory bandwidth than the P4 and the Athlon 64, but is not affected by low bandwidth due to the architectural superiority and management of such. Since you are partial to charts and benchmarks, Anandtech.com, and other sites too, has a review of 1333 (333MHz)FSB processors you can parse. One in particular to note is the quad core C2D chips and as with the dual C2D’s are not much in a difference with processor bandwidth when they are 1066 or 1333. And to note this is a substantial increase of 66MHz of the FSB! Now why is this so? Data flows from RAM into L2 cache, into L1 and into registers. There is a certain point that all processors have that data bandwidth does not matter, due to architectural design, coherencies, protocols, algorithms, prefetching, etc.

But some things, such as networking, are FSB based and memory I/O clock based. This has an important impact due to writes backs into and moves of data within memory. This is not as processor dependent, per se, because of the movement of data from one region and moved to another, and finally segmented done within memory, not cache. Although, some processes are done by the MAC and do take processing of the packets into different levels. LSO (Large Send Offloading or TCP segmentation) is mainly offloaded now by the MAC (With a supported OS) and not the CPU, but the data is still moved from RAM into the buffer before finally segmentation and transmit occurs.

This is where my post comes into play. Most processors have their saturated point already met. Increases are not always “beneficial” and if so are usually are within minimal amounts due to cache. Higher clocked RAM has other benefits as well to the entire system but cannot be measured in means of benchmarking by limited applications. It has to be measured by base lining the system.

So I cringe when I see how misunderstood much is, and more and more misinformation is spread throughout the Internet. I cringe at words like display bus, I cringe at how you think FSB is CPU to memory when it is not. The host interface is from the socket to the north logic. Physically and logically there is no extension to the boundary. So, do not add to my statement nor take me out of context, Ctal.